This circuit outputs a trigger if the input voltage varies more than a certain amount over a
period of time. Although it was originally designed to generate trigger outs from a UEG
running in LOOP ONLY mode, it in no way modifies the UEG. Consider it a separate
module. Thanks to Moe (Dave Bradley) and Tony Allgood and for their input.

It consists of a differentiator, two comparators, an OR gate, and a pulse stretcher.

I built this device using all 1% 1/4W resistors. While 1% resistors probably are not
necessary, it's what I already had on hand. So it was less expensive to use them than
go buy new 5% resistors. The schematic shows where 1% resistors are necessary in
order to have the same response for both increasing and decreasing input voltages.

Each comparator is half of a TL072 op-amp run off the -15V/+15V supply. Bypass caps
are not shown. I filtered the power supply on mine using a ferrite bead in series with
each rail with a 10uF (10 mfd) tantalum cap shunted to ground. Using electrolytic caps
is fine, perhaps even preferred, but tantalum caps are what I had on hand.

The 555 timer is single sided. The schematic shows an additional 10uF (10mfd) cap
going from Vcc to ground. This is to compensate for the large switching transient of the
NE555.

It has been suggested that this circuit may be improved with a 7555 CMOS timer
instead of the bipolar version used here. I have not tried this myself. I recommend
downloading the application notes for each device and compare them before making
any changes. I had an NE555 so that's what I used.

The input is differentiated by the 100nF cap and 20K resistor. It's output goes to each
comparator. I originally used 10 Ohm resistors, but I found each comparator was too
sensitive. The output of the UEG wavers a bit under certain conditions -- being cold,
being set between two values, and when driving long cables. With the 47 Ohm
resistors, the circuit ignores changes of less than 10mV, or 20 cents in pitch when
controlling a VCO. Increasing their value decreases the sensitivity of the circuit. I see
no reason why they could not be replaced with pots to make the sensitivity adjustable.

The output of the each comparator goes to an OR gate consisting of two diodes.
These are connected by a current limiting resistor to the base of an NPN transistor. The
NPN is a generic switching transistor -- it was unmarked. A 2N3904 or equivalent should
work fine.
When the output of the comparators goes high, the NPN transistor turns on, bringing the
trigger input at pin 2 low. This fires the 555 timer.

The length of the output pulse is determined by the 475K resistor and .01uf (10nF)
capacitor at pin 6. On paper, t = 1.1RC gives a pulse of 5.2mS. As a point of
reference, the 800 EG is specified to require a trigger pulse of at least 500uS, and the
Encore UEG specifies a trigger output of 5ms. Increasing the values of either the
resistor or capacitor will increase the length of the pulse. The pulse output at pin 3 is
voltage divided in half by the two 1K resistors, resulting in about 6.5V.

Here is the schematic

I built this thing and it works.
Monkey Tested. Monkey Approved.

Back to Mark’s corner